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This queue is for tickets about the Verilog-Perl CPAN distribution.

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The Basics
Id: 51160
Status: rejected
Priority: 0/
Queue: Verilog-Perl

Owner: Nobody in particular
Requestors: weigianc [...]

Bug Information
Severity: (no value)
Broken in: (no value)
Fixed in: (no value)

Subject: key word problem
Date: Fri, 6 Nov 2009 16:54:03 +0800
To: <bug-verilog-perl [...]>
From: 陳 Walter <weigianc [...]>
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the verilog::netlist do not deal the case smoothly: module a ( bit, byte, bus, in ); output bit; output [7:0] byte; output [1:0] bus; input in; endmodule it complaint about bit and byte and think they are some verilog keyword or so. the error message is: %Error: a.v:4: syntax error, unexpected NETTYPE keyword (tri0/wand/etc), expecting inout or input or output or ref Exiting due to errors the perl version is 5.10.0
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They *ARE* SystemVerilog keywords, change your code or specify verilog 2001 only. Please use to post bugs; you'll see similar questions there.

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