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This queue is for tickets about the Verilog-Perl CPAN distribution.

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The Basics
Id: 29546
Status: resolved
Priority: 0/
Queue: Verilog-Perl

People
Owner: Nobody in particular
Requestors: DMonroe [...] verivue.com
Cc:
AdminCc:

Bug Information
Severity: (no value)
Broken in: (no value)
Fixed in: (no value)



Subject: Verilog packages Error
Date: Fri, 21 Sep 2007 14:09:18 -0400
To: "bug-Verilog-Perl [...] rt.cpan.org" <bug-Verilog-Perl [...] rt.cpan.org>
From: "Monroe, Don" <DMonroe [...] verivue.com>
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Verilog-Perl-3.012 This is perl, v5.8.5 built for x86_64-linux-thread-multi Linux vvhwsrv1 2.6.9-55.0.2.ELsmp #1 SMP Tue Jun 12 17:58:20 EDT 2007 x86_64 x86_64 x86_64 GNU/Linux Attached is a tar ball containing the test case. Donald W Monroe Hardware Engineer [cid:image001.jpg@01C7FC58.FFC990F0] 3 Carlisle Rd. Westford, MA 01886 dmonroe@Verivue.com<mailto:dmonroe@Verivue.com> 978 589-1188 x2036 978 589-1138 (fax) 978 505-1394 (cell)
Subject: Verilog::Netlist System Verilog packages Error
RT-Send-CC: wsnyder [...] wsnyder.org
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Unfortunately most of the Verilog-Perl packages don't yet understand SystemVerilog, the notable exception being the preprocessor and Verilog::Language. I'll be working on this over the next months, but it won't happen soon. This will remain open so you'll see when its finally fixed. Obviously, if you're willing to provide patches towards this then they're welcome!
Subject: RE: [rt.cpan.org #29546] Verilog::Netlist System Verilog packages Error
Date: Tue, 25 Sep 2007 13:53:43 -0400
To: "bug-Verilog-Perl [...] rt.cpan.org" <bug-Verilog-Perl [...] rt.cpan.org>
From: "Monroe, Don" <DMonroe [...] verivue.com>
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thanks Donald W Monroe Hardware Engineer Verivue Inc. 3 Carlisle Rd. Westford, MA 01886 dmonroe@Verivue.com 978 589-1188 x2036 978 589-1138 (fax) 978 505-1394 (cell) Show quoted text
-----Original Message----- From: Wilson Snyder via RT [mailto:bug-Verilog-Perl@rt.cpan.org] Sent: Tuesday, September 25, 2007 1:54 PM To: Monroe, Don Subject: [rt.cpan.org #29546] Verilog::Netlist System Verilog packages Error <URL: http://rt.cpan.org/Ticket/Display.html?id=29546 > Unfortunately most of the Verilog-Perl packages don't yet understand SystemVerilog, the notable exception being the preprocessor and Verilog::Language. I'll be working on this over the next months, but it won't happen soon. This will remain open so you'll see when its finally fixed. Obviously, if you're willing to provide patches towards this then they're welcome!
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This is fixed in the beta candidate in GIT at veripool.org. It will be in 3.200. If you have additional issues please use the bug tracker at veripool.org, thanks.


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