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This queue is for tickets about the Verilog-Perl CPAN distribution.

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The Basics
Id: 27036
Status: resolved
Priority: 0/
Queue: Verilog-Perl

Owner: Nobody in particular
Requestors: nodine [...]

Bug Information
Severity: Normal
Broken in: 2.373
Fixed in: 3.000

Subject: Problem with list of memories
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In the attached file, registers "a_fifo_cam_indices" and "lt_fifo_cam_indices" do not have their memory bounds correctly initialized when Verilog::SigParser calls the signal_decl callback. Furthermore, the vector comes in as "[2:0] [3:0] [3:0]".
Subject: lh_memcat.v
Download lh_memcat.v
application/tkgate 1.7k

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