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This queue is for tickets about the Verilog-Perl CPAN distribution.

Report information
The Basics
Id: 26141
Status: resolved
Priority: 0/
Queue: Verilog-Perl

People
Owner: Nobody in particular
Requestors: nodine [...] cpan.org
Cc:
AdminCc:

Bug Information
Severity: Important
Broken in:
  • 2.372
  • 2.373
Fixed in: 3.000



Subject: Combined wire declaration/assignments
Download (untitled) / with headers
text/plain 285b
A wire declaration that combines an assignment results in incorrect information being passed to signal_decl. In the attached file, signal_decl gets called correctly with "b[0:3]" and then incorrectly with "a[2]" and "b[2]" (a re-declaration). Using perl5.8.0 and perl 5.8.8 on Linux.
Subject: wireassign.v
Download wireassign.v
application/tkgate 58b

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